Datasheet > M6MGT64BM17AWG

M6MGT64BM17AWG

更新时间： 2024-02-09 16:38:13

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
3页	118K
描述
M6MGT64BM17AWG

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M6MGT64BM17AWG 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
包装说明：	,	Reach Compliance Code：	unknown
风险等级：	5.84	湿度敏感等级：	3
Base Number Matches：	1

M6MGT64BM17AWG 数据手册

Renesas LSIs

M6MGB/T64BM17AWG

67,108,864-BIT (4,194,304-WORD BY 16-BIT) CMOS FLASH MEMORY

16,777,216-BIT (1,048,576-WORD BY 16-BIT) CMOS MOBILE RAM

Stacked-CSP ( Chip Scale Package)

Description

The M6MGB/T64BM17AWG is suitable for a high performance

cellular phone and a mobile PC that are required to be small

mounting area, weight and small power dissipation.

The M6MGB/T64BM17AWG is a Stacked Chip Scale

Package (S-CSP) that contents 64M-bit Flash memory and

16M-bit Mobile RAM in a 67-pin Stacked CSP for lead free use.

64M-bit Flash memory is a 4,194,304 words, single power

supply and high performance non-volatile memory fabricated

by CMOS technology for the peripheral circuit and DINOR IV

(Divided bit-line NOR IV) architecture for the memory cell. All

memory blocks are locked and can not be programmed or

erased, when F-WP# is Low. Using Software Lock Release

function, program or erase operation can be executed.

Features

Access Time

Flash

70ns (Max.)

Mobile RAM

85ns (Max.)

Supply Voltage

F-VCC=M-VCC=2.7 ~ 3.0V

Ta=-40 ~ 85 degree

67pin S-CSP,

Ambient Temperature

Package

16M-bit Mobile RAM is a 1,048,576 words high density RAM

fabricated by CMOS technology for the peripheral circuit and

DRAM cell for the memory array. The interface is compatible

to an asynchronous SRAM.

Ball pitch 0.80mm

Outer-ball:Su-Ag-Cu

The cells are automatically refreshed and the refresh control is

not required for system. The device also has the partial block

refresh scheme and the power down mode by writing the

command.

Application

Mobile communication products

PIN CONFIGURATION (TOP VIEW)

INDEX(Laser Marking)

F-

A20

M-

GND

F-

WE#

M-

F-

A16

A18

A17

LB#

WP#

F-

RY/BY#

M-

UB#

F-

RP#

A11

A15

A14

A13

A12

M-

OE#

F-

A21

A10

A19

DQ11

F-

CE#

DQ13 DQ15

M-

DQ9

DQ8

DQ0

DQ12

F-

GND

DQ10

DQ2

DQ6

WE#

F-

OE#

F-

GND

M-

VCC

DQ4

DQ5

DQ14

DQ7

M-

CE#

F-

VCC

DQ1

DQ3

(Top View)

8.5 mm

F-VCC

M-VCC

F-GND

M-GND

A0-A19

:VCC for Flash Memory

:VCC for Mobile RAM

:GND for Flash Memory

:GND for Mobile RAM

F-RY/BY# : Flash Memory Ready /Busy

F-OE#

M-OE#

F-WE#

M-WE#

F-WP#

F-RP#

M-LB#

:Output enable for Flash Memory

:Output enable for Mobile RAM

:Write enable for Flash Memory

:Write enable for Mobile RAM

:Write protect for Flash

:Common address for Flash/Mobile RAM

F-A20,F-A21 :Common address for Flash

DQ0-DQ15

F-CE#

:Data I/O

:Flash chip enable

:Mobile RAM chip enable

:Reset power down for Flash

:Lower byte control for Mobile RAM

M-CE#

M-UB#

:Upper byte control for Mobile RAM

: Non Connection

Rev.1.0.48a_bezb

12 3

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