Very Low Power CMOS SRAM
256K X 16 bit
BS616LV4017
Pb-Free and Green package materials are compliant to RoHS
n FEATURES
ŸWide VCC operation voltage : 2.4V ~ 5.5V
n DESCRIPTION
The BS616LV4017 is a high performance, very low power CMOS
Static Random Access Memory organized as 262,144 by 16 bits and
operates form a wide range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both
high speed and low power features with typical CMOS standby
current of 0.25uA at 3.0V/25OC and maximum access time of 55ns at
3.0V/85OC.
ŸVery low power consumption :
VCC = 3.0V
VCC = 5.0V
Operation current : 27mA (Max.) at 55ns
2mA (Max.) at 1MHz
Standby current : 0.25uA (Typ.)at 25OC
Operation current : 65mA (Max.) at 55ns
10mA (Max.) at 1MHz
Standby current : 1.5uA (Typ.) at 25OC
ŸHigh speed access time :
Easy memory expansion is provided by an active LOW chip enable
(CE) and active LOW output enable (OE) and three-state output
drivers.
-55
-70
55ns(Max.) at VCC=3.0~5.5V
70ns(Max.) at VCC=2.7~5.5V
ŸAutomatic power down when chip is deselected
ŸEasy expansion with CE and OE options
ŸI/O Configuration x8/x16 selectable by LB and UB pin.
ŸThree state outputs and TTL compatible
ŸFully static operation
The BS616LV4017 has an automatic power down feature, reducing
the power consumption significantly when chip is deselected.
The BS616LV4017 is available in DICE form, JEDEC standard
44-pin TSOP II and 48-ball BGA package.
ŸData retention supply voltage as low as 1.5V
n POWER CONSUMPTION
POWER DISSIPATION
Operating
STANDBY
PRODUCT
FAMILY
OPERATING
TEMPERATURE
PKG TYPE
(ICCSB1, Max)
(ICC, Max)
VCC=5.0V
10MHz
VCC=3.0V
10MHz
VCC=5.0V VCC=3.0V
1MHz
9mA
fMax.
1MHz
fMax.
BS616LV4017DC
BS616LV4017AC
BS616LV4017EC
BS616LV4017AI
BS616LV4017EI
DICE
Commercial
10uA
20uA
2.0uA
4.0uA
39mA
40mA
63mA
1.5mA
14mA
15mA
26mA
BGA-48-0608
TSOP II-44
BGA-48-0608
TSOP II-44
+0OC to +70OC
Industrial
10mA
65mA
2mA
27mA
-40OC to +85OC
n PIN CONFIGURATIONS
n BLOCK DIAGRAM
A4
A3
A2
A1
A0
1
2
3
4
5
6
7
8
44
A5
A6
A7
OE
UB
LB
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A12
A11
A10
CE
DQ0
DQ1
DQ2
DQ3
VCC
VSS
DQ4
DQ5
DQ6
DQ7
WE
A17
A16
A15
A14
A13
DQ15
DQ14
DQ13
DQ12
VSS
VCC
DQ11
DQ10
DQ9
DQ8
NC
A8
A9
A10
A11
A12
A9
A8
A5
A6
A7
A4
A3
Address
Input
1024
Memory Array
10
9
Row
Decoder
10
11
12
13
14
15
16
17
18
19
20
21
22
BS616LV4017EC
BS616LV4017EI
Buffer
1024 x 4096
4096
DQ0
Data
Input
Buffer
16
16
Column I/O
.
.
.
.
.
.
.
.
Write Driver
Sense Amp
.
16
1
2
3
4
5
6
.
16
Data
Output
Buffer
.
.
256
A
B
C
D
E
F
LB
D8
OE
A0
A1
A2
NC
D0
Column Decoder
DQ15
UB
D10
D11
D12
D13
NC
A3
A5
A4
A6
CE
D1
8
CE
WE
OE
UB
LB
D9
D2
Address Input Buffer
Control
VSS
VCC
D14
D15
NC
A17
NC
A14
A12
A9
A7
D3
VCC
VSS
D6
A13 A14 A15 A16 A17 A0 A1 A2
A16
A15
A13
A10
D4
VCC
VSS
D5
G
H
WE
A11
D7
A8
NC
48-ball BGA top view
Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.
R0201-BS616LV4017
Revision 1.3
May. 2006
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