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BS616LV4018ACG70 PDF预览

BS616LV4018ACG70

更新时间: 2024-02-04 17:20:14
品牌 Logo 应用领域
BSI 静态存储器内存集成电路
页数 文件大小 规格书
10页 265K
描述
Standard SRAM, 256KX16, 70ns, CMOS, PBGA48, MINIBGA-48

BS616LV4018ACG70 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:BGA, BGA48,6X8,30Reach Compliance Code:unknown
风险等级:5.84最长访问时间:70 ns
备用内存宽度:8I/O 类型:COMMON
JESD-30 代码:R-PBGA-B48长度:8 mm
内存密度:4194304 bit内存集成电路类型:STANDARD SRAM
内存宽度:16湿度敏感等级:3
功能数量:1端子数量:48
字数:262144 words字数代码:256000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:256KX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装等效代码:BGA48,6X8,30
封装形状:RECTANGULAR封装形式:GRID ARRAY
并行/串行:PARALLEL电源:5 V
认证状态:Not Qualified座面最大高度:1.4 mm
最大待机电流:0.0000013 A最小待机电流:1.5 V
子类别:SRAMs最大压摆率:0.055 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:BALL端子节距:0.75 mm
端子位置:BOTTOM宽度:6 mm

BS616LV4018ACG70 数据手册

 浏览型号BS616LV4018ACG70的Datasheet PDF文件第2页浏览型号BS616LV4018ACG70的Datasheet PDF文件第3页浏览型号BS616LV4018ACG70的Datasheet PDF文件第4页浏览型号BS616LV4018ACG70的Datasheet PDF文件第5页浏览型号BS616LV4018ACG70的Datasheet PDF文件第6页浏览型号BS616LV4018ACG70的Datasheet PDF文件第7页 
Very Low Power/Voltage CMOS SRAM  
BSI 256K X 16 bit  
• Vcc operation voltage : 4.5V ~ 5.5V  
• Very low power consumption :  
Vcc = 5.0V C-grade: 63mA (@55ns) operating current  
I -grade: 65mA (@55ns) operating current  
C-grade: 53mA (@70ns) operating current  
I -grade: 55mA (@70ns) operating current  
2.0uA (Typ.) CMOS standby current  
• High speed access time :  
BS616LV4018  
• Easy expansion with CE and OE options  
„ FEATURES  
• I/O Configuration x8/x16 selectable by LB and UB pin  
„ DESCRIPTION  
The BS616LV4018 is a high performance, very low power CMOS Static  
Random Access Memory organized as 262,144 words by 16 bits and  
operates from a range of 4.5V to 5.5V supply voltage.  
Advanced CMOS technology and circuit techniques provide both high  
speed and low power features with a typical CMOS standby current of  
2.0uA at 5.0V/25oC and maximum access time of 55ns at 5.0V/85oC.  
Easy memory expansion is provided by an active LOW chip enable (CE)  
,active LOW output enable(OE) and three-state output drivers.  
The BS616LV4018 has an automatic power down feature, reducing the  
power consumption significantly when chip is deselected.  
-55  
-70  
55ns  
70ns  
• Automatic power down when chip is deselected  
• Three state outputs and TTL compatible  
• Fully static operation  
The BS616LV4018 is available in DICE form , JEDEC standard 44-pin  
TSOP Type II package and 48-ball BGA package.  
• Data retention supply voltage as low as 1.5V  
„ PRODUCT FAMILY  
POWER DISSIPATION  
SPEED  
Operating  
STANDBY  
(
ns )  
OPERATING  
PRODUCT FAMILY  
Vcc  
RANGE  
( ICCSB1 , Max )  
( I CC , Max )  
PKG TYPE  
TEMPERATURE  
55ns:4.5~5.5V  
70ns:4.5~5.5V  
Vcc = 5.0V  
Vcc = 5.0V  
55ns  
Vcc =  
5.0V  
70ns  
BS616LV4018DC  
BS616LV4018EC  
DICE  
+0O C to +70O  
C
TSOP2-44  
BGA-48-0608  
DICE  
4.5V ~ 5.5V  
4.5V ~ 5.5V  
55 / 70  
55 / 70  
63mA  
65mA  
53mA  
30uA  
BS616LV4018AC  
BS616LV4018DI  
-40O C to +85OC  
60uA  
TSOP2-44  
BGA-48-0608  
BS616LV4018EI  
BS616LV4018AI  
55mA  
„ PIN CONFIGURATIONS  
„ BLOCK DIAGRAM  
1
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
A4  
A3  
A5  
A6  
A7  
OE  
UB  
LB  
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
A2  
A1  
A0  
CE  
A4  
A3  
A2  
DQ0  
DQ1  
DQ2  
DQ3  
VCC  
GND  
DQ4  
DQ5  
DQ6  
DQ7  
WE  
A17  
A16  
A15  
A14  
A13  
DQ15  
DQ14  
DQ13  
DQ12  
GND  
VCC  
DQ11  
DQ10  
DQ9  
DQ8  
NC  
A8  
A9  
A10  
A11  
A12  
A1  
Address  
22  
2048  
A0  
A17  
A16  
BS616LV4018EC  
BS616LV4018EI  
Input  
Row  
Memory Array  
2048 x 2048  
Buffer  
A15  
A14  
A13  
A12  
Decoder  
2048  
Data  
Input  
Buffer  
16  
16  
16  
Column I/O  
DQ0  
.
.
.
.
.
.
.
.
Write Driver  
Sense Amp  
128  
Data  
Output  
16  
Buffer  
Column Decoder  
DQ15  
14  
CE  
WE  
OE  
UB  
Control  
Address Input Buffer  
LB  
A11 A10 A9 A8 A7  
A6 A5  
Vcc  
Gnd  
Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.  
Revision 2.1  
R0201-BS616LV4018  
1
Jan.  
2004  

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