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THCV231-Q PDF预览

THCV231-Q

更新时间: 2022-02-26 13:11:53
品牌 Logo 应用领域
THINE /
页数 文件大小 规格书
58页 1447K
描述
SerDes transmitter and receiver with bi-directional transceiver

THCV231-Q 数据手册

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THCV231-Q_THCV236-Q_Rev.2.60_E  
THCV231-Q and THCV236-Q  
SerDes transmitter and receiver with bi-directional transceiver  
General Description  
Features  
Data width selectable  
Wide frequency range  
The THCV231-Q and THCV236-Q are designed to  
support video data transmission between the host and  
display.  
AC coupling for high-speed lanes  
CDR requires no external frequency reference  
Wide range supply voltage from 1.7V to 3.6V  
Additional spread spectrum on data stream  
2-wire serial interface bridge function(400kbps)  
Remote side GPIO control and monitoring  
THCV231-Q  
THCV231-Q  
One high-speed lane can carry up to 14bits data at a  
pixel clock frequency from 12MHz to 160MHz.  
THCV236-Q  
QFN32 (5mm x 5mm) with exposed pad ground  
THCV236-Q  
One high-speed lane can carry up to 32bit data and  
3bits of synchronizing signals at a pixel clock  
frequency from 6MHz to 160MHz by converting  
RGB444 to YCbCr422.  
The chipset, which has one high-speed data lane,  
can transmit video data up to 1080p/60Hz.  
The maximum serial data rate is 4.00Gbps/lane.  
QFN64 (9mm x 9mm) with exposed pad ground  
AEC-Q100 Grade 2 (-40 to 105degC)  
ISO/TS16949 compliant  
EU RoHS compliant  
Block Diagram  
THCV231-Q  
THCV236-Q  
D11-D0  
HSYNC  
VSYNC  
CLKIN  
D31-D0  
HSYNC  
VSYNC  
DE  
TXP  
TXN  
RXP  
RXN  
CLKOUT  
TCMP  
TCMN  
RCMP  
RCMN  
Settings  
2-wire I/F  
SDA/SCL  
Settings  
2-wire I/F  
SDA/SCL  
Controls  
Controls  
OSC  
LDO  
OSC  
LDO  
CAPOUT  
CAPINA  
CAPINP  
CAPOUT  
CAPINA  
Copyright©2017 THine Electronics, Inc.  
THine Electronics, Inc.  
1/58  
Security E  

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