Datasheet > MT92101A/PR/BP1R

MT92101A/PR/BP1R

更新时间： 2024-01-15 09:36:43

品牌	Logo	应用领域
美高森美 - MICROSEMI		商用集成电路
页数	文件大小	规格书
16页	122K
描述
Consumer Circuit, CMOS, PBGA288, PLASTIC, BGA-288

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技术参数
数据手册

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MT92101A/PR/BP1R 技术参数

生命周期：	Obsolete	零件包装代码：	BGA
包装说明：	,	针数：	288
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.84	商用集成电路类型：	CONSUMER CIRCUIT
JESD-30 代码：	S-PBGA-B288	功能数量：	1
端子数量：	288	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装形状：	SQUARE	封装形式：	GRID ARRAY
认证状态：	Not Qualified	最大供电电压 (Vsup)：	3.6 V
最小供电电压 (Vsup)：	3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子形式：	BALL	端子位置：	BOTTOM
Base Number Matches：	1

MT92101A/PR/BP1R 数据手册

MT92101

IP Phone Processor

Preliminary Information

DS5251

ISSUE 1

February 2000

Features

•

Low Voltage Operation, 1.65 to 1.95 Volts

Ordering Information

Standard 3.3 Volt Signal Interfaces

On-chip RISC CPU and Powerful DSP

Standard Integrated System Interfaces

Embedded Physical Layer Firmware

MT92101A/PR/BP1R 288 Ball PBGA

MT92101A/PR/GP1R 208 Pin QFP

-40°C to +85°C

G.729.AB and G.723.1A Vocoders, including

VAD and CNG*

Description

•

Group 3 Fax Relay, 2400 – 14400 bps

H.323, MGCP, or SIP Protocol Software

Available

The MT92101 IP Phone Processor provides a highly

integrated solution for an IP phone for use in

enterprise applications. The IP Phone Processor

integrates an ARM-Thumb RISC CPU and

supporting subsystem including dual Ethernet MAC

•

JTAG Port for Debug and Boundary Scan

Applications

and bridge, together with an OAKDSPCore , full

RAM and ROM and a supporting subsystem.

Firmware is embedded to allow the implementation

of multi-channel voice compression, echo cancel-

lation and supporting functions on the DSP.

•

Voice over IP Enterprise Telephones and

Related Equipment

*subject to patent indeminiﬁcation

JTAG TEST + DEBUG

JTAG

TDM

AUDIO

AEC

USB

THUMB

CPU

PKM

DMA

INT

ICEBREAKER

UART

OAK

DSP

SSIO

C-bus

INTERFACE

OCEM

INT

RAM

7k Data

4k Prog

MEMORY

INTERFACE

DMA

ROM

8k Data

60k Prog

GP TIM

DES

MII

GIO

802.1/p/d/Q

BRIDGE

10/100 MAC

KEYPD

MII

BµILD

WATCH

EXTERNAL

MEMORY

INTERFACE

TDM Master

PLL

EXTMAST

nRESET

SELECT ENABLE

Figure 1 - Functional Block Diagram

12 3 4 5 6 7...16

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