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BS62LV4000TCP70 PDF预览

BS62LV4000TCP70

更新时间: 2024-01-09 14:26:16
品牌 Logo 应用领域
BSI 静态存储器光电二极管
页数 文件大小 规格书
9页 256K
描述
Standard SRAM, 512KX8, 70ns, CMOS, PDSO32

BS62LV4000TCP70 数据手册

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Very Low Power/Voltage CMOS SRAM  
512K X 8 bit  
BSI  
BS62LV4000  
„ GENERAL DESCRIPTION  
„ FEATURES  
• Wide Vcc operation voltage : 2.7V ~ 3.6V  
• Very low power consumption :  
The BS62LV4000 is a high performance, very low power CMOS  
Static Random Access Memory organized as 524,288 words by 8 bits  
and operates from a wide range of 2.7V to 3.6V supply voltage.  
Advanced CMOS technology and circuit techniques provide both high  
speed and low power features with a typical CMOS standby current of  
0.5uA and maximum access time of 70ns in 3V operation.  
Easy memory expansion is provided by an active LOW chip  
enable (CE), and active LOW output enable (OE) and three-state  
output drivers.  
Vcc = 3.0V C-grade: 20mA (Max.) operating current  
I -grade: 25mA (Max.) operating current  
0.5uA (Typ.) CMOS standby current  
• High speed access time :  
-70  
-10  
70ns (Max) at Vcc = 3.0V  
100ns (Max) at Vcc = 3.0V  
• Automatic power down when chip is deselected  
• Three state outputs and TTL compatible  
• Fully static operation  
• Data retention supply voltage as low as 1.5V  
• Easy expansion with CE and OE options  
The BS62LV4000 has an automatic power down feature, reducing the  
power consumption significantly when chip is deselected.  
The BS62LV4000 is available in the JEDEC standard 32 pin 8mmx  
13.4mm STSOP, and 8mmx20mm TSOP.  
„ PRODUCT FAMILY  
POWER DISSIPATION  
SPEED  
( ns )  
STANDBY  
Operating  
PRODUCT  
FAMILY  
OPERATING  
TEMPERATURE  
Vcc  
RANGE  
( ICCSB1 , Max )  
( ICC, Max )  
PKG TYPE  
Vcc=3.0V  
Vcc=3.0V  
Vcc=3.0V  
TSOP-32  
STSOP-32  
TSOP-32  
STSOP-32  
BS62LV4000TC  
BS62LV4000STC  
BS62LV4000TI  
BS62LV4000STI  
+0O C to +70O C 2.7V ~ 3.6V  
-40O C to +85O C 2.7V ~ 3.6V  
70 / 100  
70 / 100  
8uA  
20mA  
25mA  
12uA  
„ PIN CONFIGURATIONS  
„ FUNCTIONAL BLOCK DIAGRAM  
A13  
A17  
A15  
A18  
A16  
A14  
A12  
A7  
Address  
Input  
Memory Array  
22  
2048  
1
2
3
4
5
6
7
8
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
Row  
A11  
A9  
A8  
OE  
A10  
CE  
2048 X 2048  
Decoder  
Buffer  
A13  
WE  
A17  
A15  
VCC  
A18  
A16  
A14  
A12  
A7  
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
GND  
DQ2  
DQ1  
DQ0  
A0  
A6  
A5  
A4  
BS62LV4000TC  
BS62LV4000STC  
BS62LV4000TI  
BS62LV4000STI  
2048  
9
10  
11  
12  
13  
14  
15  
16  
DQ0  
DQ1  
DQ2  
DQ3  
DQ4  
DQ5  
DQ6  
DQ7  
8
Data  
Input  
Buffer  
8
Column I/O  
Write Driver  
Sense Amp  
A6  
A5  
A4  
A1  
A2  
A3  
8
8
Data  
Output  
Buffer  
256  
Column Decoder  
16  
CE  
WE  
OE  
Control  
Address Input Buffer  
Vdd  
Gnd  
A11 A9 A8 A3 A2 A1 A0 A10  
Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.  
Revision 2.3  
Jan. 2004  
R0201-BS62LV4000  
1

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