Datasheet > AZT740

AZT740

更新时间： 2022-02-26 13:49:34

品牌	Logo	应用领域
POSEICO		/
页数	文件大小	规格书
4页	197K
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HIGH CURRENT PHASE CONTROL

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数据手册

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AZT740 数据手册

POSEICO SPA

Via Pillea 42-44, 16153 Genova - ITALY

Tel. + 39 010 8599400 - Fax + 39 010 8682006

Sales Office:

Tel. + 39 010 8599400 - sales@poseico.com

HIGH CURRENT PHASE CONTROL

THYRISTOR INSULATED MODULE

AZT740

Repetitive voltage up to

Mean forward current

Surge current

2200 V

719 A

30 kA

FINAL SPECIFICATION

Feb. 17 - Issue: 3

[°C]

Symbol

Characteristic

Conditions

Value

Unit

BLOCKING

V RRM

V RSM

V DRM

Repetitive peak reverse voltage

Non-repetitive peak reverse voltage

Repetitive peak off-state voltage

Repetitive peak reverse current

Repetitive peak off-state current

125

2200

2300

2200

RRM

DRM

V=VRRM

CONDUCTING

T (AV)

TSM

Mean forward current

180° sin, 50 Hz, Tc=55°C, double side cooled

180° sin, 50 Hz, Tc=85°C, double side cooled

1082

719

Mean forward current

Surge forward current

I² t

Sine wave, 10 ms

without reverse voltage

125

x 10³

I² t

4500

1,53

A²s

V T

On-state voltage

Threshold voltage

On-state slope resistance

On-state current =

1800 A

V T(TO)

125

0,90

0,240

mohm

SWITCHING

From 75% VDRM up to 3550 A; gate 10V, 5W

Linear ramp up to 70% of VDRM

di/dt

Critical rate of rise of on-state current, min.

Critical rate of rise of off-state voltage, min.

Gate controlled delay time, typical

Circuit commutated turn-off time, typical

Reverse recovery charge

125

200

500

A/µs

V/µs

µs

dv/dt

VD=100V; gate source 25V, 10W , tr=.5 µs

dv/dt = 20 V/µs linear up to 75% VDRM

di/dt = -20 A/µs, I= 2330 A

VR= 50 V

250

µs

Q rr

125

µC

Peak reverse recovery current

Holding current, typical

VD=5V, gate open circuit

VD=5V, tp=30µs

300

700

Latching current, typical

GATE

V GT

Gate trigger voltage

VD=5V

3,50

300

0,25

Gate trigger current

VD=5V

V GD

Non-trigger gate voltage, min.

Peak gate voltage (forward)

Peak gate current

VD=VDRM

125

V FGM

FGM

V RGM

P GM

P G

Peak gate voltage (reverse)

Peak gate power dissipation

Average gate power dissipation

Pulse width 100 µs

150

MOUNTING

R th(j-h)

R th(c-h)

T j

Thermal impedance, DC

Thermal impedance

Operating junction temperature

Mounting force

Junction to heatsink, double side cooled

Case to heatsink, double side cooled

42,0

°C/kW

°C

-30 / 125

04,0 / 06,0

2800

Mass

ORDERING INFORMATION : AZT740 S 22

VRRM/100

standard specification

12 3 4

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