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ADL5243-EVALZ

更新时间: 2022-10-09 10:01:07
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
32页 1021K
描述
100 MHz to 4000 MHz RF/IF Digitally Controlled VGA

ADL5243-EVALZ 数据手册

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100 MHz to 4000 MHz  
RF/IF Digitally Controlled VGA  
Data Sheet  
ADL5243  
FEATURES  
GENERAL DESCRIPTION  
Operating frequency from 100 MHz to 4000 MHz  
Digitally controlled VGA with serial and parallel interfaces  
6-bit, 0.5 dB digital step attenuator  
31.5 dB gain control range with 0.25 dB step accuracy  
Gain Block Amplifier 1  
Gain: 19.2 dB at 2140 MHz  
OIP3: 40.2 dBm at 2140 MHz  
P1dB: 19.8 dBm at 2140 MHz  
Noise figure: 2.9 dB at 2140 MHz  
The ADL5243 is a high performance, digitally controlled  
variable gain amplifier operating from 100 MHz to 4000 MHz.  
The VGA integrates two high performance amplifiers and a  
digital step attenuator (DSA). Amplifier 1 (AMP1) is an  
internally matched gain block amplifier with 20 dB gain, and  
Amplifier 2 (AMP2) is a broadband ¼ W driver amplifier. The  
DSA is 6-bit with a 31.5 dB gain control range, 0.5 dB steps, and  
0.25 dB step accuracy. The attenuation of the DSA can be  
controlled using a serial or parallel interface.  
¼ W Driver Amplifier 2  
The gain block and DSA are internally matched to 50 Ω at their  
inputs and outputs, and all three internal devices are separately  
biased. The separate bias allows all or part of the ADL5243 to be  
used, which allows for easy reuse throughout a design. The  
pinout of the ADL5243 also enables the gain block, DSA, or  
¼ W driver amplifier to be first, giving the VGA maximum  
flexibility in a signal chain.  
Gain: 14.2 dB at 2140 MHz  
OIP3: 41.1 dBm at 2140 MHz  
P1dB: 26.0 dBm at 2140 MHz  
Noise figure: 3.7 dB at 2140 MHz  
Gain block, DSA, or ¼ W driver amplifier can be first  
Low quiescent current of 175 mA  
The companion ADL5240 integrates a gain block with DSA  
The ADL5243 consumes 175 mA and operates off a single  
supply ranging from 4.75 V to 5.25 V. The VGA is packaged in a  
thermally efficient, 5 mm × 5 mm, 32-lead LFCSP and is fully  
specified for operation from −40°C to +85°C. A fully populated  
evaluation board is available.  
APPLICATIONS  
Wireless infrastructure  
Automated test equipment  
RF/IF gain control  
FUNCTIONAL BLOCK DIAGRAM  
32  
31  
30  
29  
28  
27  
26  
25  
1
2
3
4
5
6
7
8
24  
VDD  
VDD  
SERIAL/PARALLEL INTERFACE  
NC  
23 NC  
NC  
22 NC  
DSAIN  
21 DSAOUT  
0.5dB  
1dB  
2dB  
4dB  
8dB  
16dB  
20  
19  
18  
NC  
NC  
ADL5243  
AMP1OUT/VCC  
AMP2IN  
NC  
AMP2  
15  
NC  
NC  
AMP1  
10  
17 NC  
9
11  
12  
13  
14  
16  
Figure 1.  
Rev. A  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2011 Analog Devices, Inc. All rights reserved.  
 

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