a
Pulse Width Modulator
AD9561
FUNCTIONAL BLOCK DIAGRAM
FEATURES
60 MHz Pulse Rate
8-Bit Resolution
AD9561
Center, Left or Right Justify
Low Power: 700 mW typical
Minimum Pulse Width: <5 ns
Maximum PW: 100 % Full-scale
RAMP
INTERNAL
TIMING
OUTPUT
LOGIC
CLOCK
RAMP
REF
CAL
OUT
APPLICATIONS
Laser Printers
Digital Copiers
Color Copiers
R
SET
CAL
DAC
PWM
OUT
CAL IN
8-BIT
DATA
L
A
T
C
H
L
DAC
CAL
OUT
A
T
C
H
SEM/DEM
LEM/TEM
RETRACE
GENERAL DESCRIPTION
Additionally, input data setup and hold time are symmetrical at
2 ns each, simplifying interface to the system bus.
The AD9561 is a second generation high speed, digitally
programmable pulse width modulator (PWM). Output pulse
width is proportional to an 8-bit DATA input value. Two
additional control inputs determine if the pulse is placed at the
beginning, middle or end of the clock period. Pulse width and
placement can be changed every clock cycle up to 60 MHz.
Finally, chip design and pinout are optimized to decrease
sensitivity of analog circuits to digital coupling. (See layout
section for detailed recommendations for optimum results.)
Inputs are TTL or CMOS compatible, and outputs are CMOS
compatible. The AD9561JR is packaged in a 28-lead plastic
SOIC. It is rated over the commercial temperature range, 0°C
to +70°C.
Pulse width modulation is a well proven method for controlling
gray scale and resolution enhancement in scanning laser print
engines. Modulating pulse width provides the most cost
effective method for continuous tone reproduction and resolu-
tion enhancement in low-to-moderate cost scanning electro-
photographic systems.
HIGHLIGHTS
1. 60 MHz native printer clock rate.
2. Single +5 V power supply.
3. On-chip Autocalibration.
The AD9561 uses precision analog circuits to control dot size
so that near-photographic quality images are practical without
the high frequency clock signals required by all digital approaches.
4. Pulse placement flexibility.
5. High resolution: 256 pulse widths.
The AD9561 has improved features and performance over its
predecessor, the AD9560. An improved ramp topology enables
control of pulse width through 100% of the dot clock period as
opposed to 95% for the AD9560. This enables smooth transi-
tion across dot boundaries for line screen applications.
REV. 0
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© Analog Devices, Inc., 1996