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SG3525 PDF预览

SG3525

更新时间: 2023-12-20 18:44:38
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
12页 934K
描述
电压模式PWM

SG3525 数据手册

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SG2525A  
SG3525A  
®
REGULATING PULSE WIDTH MODULATORS  
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8 TO 35 V OPERATION  
5.1 V REFERENCE TRIMMED TO ± 1 %  
100 Hz TO 500 KHz OSCILLATOR RANGE  
SEPARATE OSCILLATOR SYNC TERMINAL  
ADJUSTABLE DEADTIME CONTROL  
INTERNAL SOFT-START  
PULSE-BY-PULSE SHUTDOWN  
INPUT UNDERVOLTAGE LOCKOUT WITH  
HYSTERESIS  
DIP16  
16(Narrow)  
.
LATCHING PWM TO PREVENT MULTIPLE  
PULSES  
DUAL SOURCE/SINK OUTPUT DRIVERS  
.
DESCRIPTION  
The SG3525A series of pulse width modulator inte-  
grated circuits are designed to offer improved per-  
formance and lowered external parts count when  
used in designing all types of switching power sup-  
plies. The on-chip + 5.1 V reference is trimmed to ±  
1 % and the input common-mode range of the error  
amplifier includes the reference voltage eliminating  
external resistors. A sync input to the oscillator al-  
lows multiple units to be slaved or a single unit to be  
synchronized to an external system clock. A single  
resistor between the CT and the discharge terminals  
provide a wide range of dead time ad- justment.  
These devices also feature built-insoft-startcircuitry  
with only an external timing capacitor required. A  
shutdown terminal controls both the soft-start circu-  
ity and the output stages, providing instantaneous  
turn off through the PWM latch with pulsed shut-  
down, as well as soft-start recycle with longer shut-  
down commands. These functions are also control-  
led by an undervoltage lockout which keeps the out-  
puts off and the soft-start capacitor discharged for  
sub-normal input voltages. This lockout circuitry in-  
cludes approximately 500 mV of hysteresis for jitter-  
free operation. Another feature of these PWM cir-  
cuits is a latch following the comparator. Once a  
PWM pulses has been terminated for any reason,  
the outputs will remain off for the duration of the pe-  
riod. The latch is reset with each clock pulse. The  
output stages are totem-pole designs capable of  
sourcing or sinking in excess of 200 mA. The  
SG3525A output stage features NOR logic, giving a  
LOW output for an OFF state.  
PIN CONNECTIONS AND ORDERING NUMBERS  
(top view)  
Type  
Plastic DIP  
SG2525AN  
SG3525AN  
SO16  
SG2525A  
SG3525A  
SG2525AP  
SG3525AP  
June 2000  
1/12  

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