Datasheet > G2995

G2995

更新时间： 2022-11-24 21:54:30

品牌	Logo	应用领域
致新 - GMT		稳压器双倍数据速率
页数	文件大小	规格书
12页	272K
描述
DDR Termination Regulator

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数据手册

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G2995 数据手册

Global Mixed-mode Technology Inc.

DDR Termination Regulator

General Description

G2995

Features

Operation Supply Voltage: 1.6V to 5.5V

The G2995 is a linear regulator designed to meet the

JEDEC SSTL-2 and SSTL-3 (Series Stub Termination

Logic) specifications for termination of DDR-SDRAM.

It contains a high-speed operational amplifier that pro-

vides excellent response to the load transients. This

device can deliver 1.5A continuous current and tran-

sient peaks up to 3A in the application as required for

DDR-SDRAM termination. With an independent V_SENSE

pin, the G2995 can provide superior load regulation.

The G2995 provides a V_REFoutput as the reference for

the applications of the chipset and DIMMs.

Low Supply Current: 280µA @ 2.5V

Low Output Offset

Source and Sink Current

Low External Component Count

No Inductor Required

No external Resistors Required

Thermal Shutdown Protection

SOP-8L with Power-Pad package

Applications

DDR-SDRAM Termination Voltage

The G2995 can easily provide the accurate V_TTand

V_REFvoltages without external resistors that PCB ar-

eas can be reduced. The quiescent current is as low

as 280µA @ 2.5V. So the power consumption can

meet the low power consumption applications.

DDR-I / DDR-II Termination Voltage

SSTL-2

SSTL-3

Ordering Information

ORDER

NUMBER

G2995P1U

G2995F1U

ORDER NUMBER

TEMP.

RANGE

MARKING

PACKAGE

(Pb free)

G2995P1Uf

G2995F1Uf

G2995

-40°C to 85°C

SOP-8

SOP-8 (FD)

Note: P1:SOP-8

U: Tape & Reel

F1:SOP-8(FD)

(FD): Thermal Pad

Pin Configuration

Typical Application Circuit

G2995

VTT

GND

V_DDQ

V_DDQ=2.5V

V_REF

V_REF=1.25V

0.01µF

PVIN

AVIN

VDDQ

Thermal

Pad

_DD=2.5V

AV_IN

PV_IN

V_SENSE

V_TT

VSENSE

VREF

V_TT=1.25V

GND

47µF

220µF

SOP-8

TEL: 886-3-5788833

http://www.gmt.com.tw

Ver: 1.7

May 10, 2005

12 3 4 5 6 7...12

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