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DM9161 PDF预览

DM9161

更新时间: 2024-02-21 16:42:47
品牌 Logo 应用领域
联杰 - DAVICOM 以太网局域网(LAN)标准
页数 文件大小 规格书
50页 661K
描述
10/100 Mbps Fast Ethernet Physical Layer TX/FX Single Chip Transceiver

DM9161 技术参数

是否Rohs认证: 符合生命周期:Contact Manufacturer
零件包装代码:QFP包装说明:LFQFP,
针数:48Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5
Is Samacsys:NJESD-30 代码:S-PQFP-G48
长度:7 mm功能数量:1
端子数量:48最高工作温度:70 °C
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
座面最大高度:1.6 mm标称供电电压:3.3 V
表面贴装:YES技术:CMOS
电信集成电路类型:ETHERNET TRANSCEIVER端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
宽度:7 mmBase Number Matches:1

DM9161 数据手册

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DM9161  
10/100 Mbps Fast Ethernet Physical Layer TX/FX Single Chip Transceiver  
1. General Description  
The DM9161 is a physical layer, single-chip, and low  
power transceiver for 100BASE-TX 100BASE-FX and  
10BASE-T operations. On the media side, it provides  
a direct interface either to Unshielded Twisted Pair  
Category 5 Cable (UTP5) for 100BASE-TX Fast  
Ethernet, or UTP5/UTP3 Cable for 10BASE-T  
Ethernet. Through the Media Independent Interface  
(MII), the DM9161 connects to the Medium Access  
Control (MAC) layer, ensuring a high inter-operability  
from different vendors.  
functions of 100BASE-TX as defined by IEEE802.3u,  
including the Physical Coding Sublayer (PCS),  
Physical Medium Attachment (PMA), Twisted Pair  
Physical Medium Dependent Sublayer (TP-PMD),  
10BASE-TX Encoder/Decoder (ENC/DEC), and  
Twisted Pair Media Access Unit (TPMAU). The  
DM9161 provides  
a
strong support for the  
auto-negotiation function, utilizing automatic media  
speed and protocol selection. Furthermore, due to the  
built-in wave-shaping filter, the DM9161 needs no  
external filter to transport signals to the media in  
100BASE-TX or 10BASE-T Ethernet operation.  
The DM9161 uses a low power and high performance  
CMOS process. It contains the entire physical layer  
2. Block Diagram  
100Base-FX  
PECL  
Interface  
100Base-  
TX  
PCS  
MII/RMII/  
GPSI  
Interface  
100Base-TX  
Transceiver  
10Base-T  
TX/RX Module  
LED Driver  
Auto-Negotiation  
Clock  
Circuit  
Block  
Biasing/  
Power  
Block  
MII  
MII  
Register  
Management  
Control  
Final  
1
Version: DM9161-DS-F05  
September 10, 2008  

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