Very Low Power/Voltage CMOS SRAM
256K X 8 bit
BSI
BS62LV2000
DESCRIPTION
FEATURES
The BS62LV2000 is a high performance, very low power CMOS
Static Random Access Memory organized as 262,144 words by 8 bits
and operates from a wide range of 2.7V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current of
0.15uA and maximum access time of 70ns in 3V operation.
• Wide Vcc operation voltage : 2.7V ~ 5.5V
• Very low power consumption :
Vcc = 3.0V C-grade : 20mA (Max.) operating current
I- grade : 25mA (Max.) operating current
0.15uA (Typ.) CMOS standby current
Vcc = 5.0V C-grade : 40mA (Max.) operating current
I- grade : 45mA (Max.) operating current
3uA (Typ.) CMOS standby current
Easy memory expansion is provided by an active LOW chip
enable (CE1), an active HIGH chip enable (CE2), and active LOW
output enable (OE) and three-state output drivers.
• High speed access time :
The BS62LV2000 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
-70
-10
70ns(Max.) at Vcc = 3.0V
100ns(Max.) at Vcc = 3.0V
The BS62LV2000 is available in the JEDEC standard 32 pin
450mil Plastic SOP, 8mmx13.4mm STSOP and 8mmx20mm TSOP.
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE2, CE1, and OE options
• All I/O pins are 3V/5V tolerant
PRODUCT FAMILY
POWER DISSIPATION
SPEED
(ns)
STANDBY
Operating
PRODUCT
FAMILY
OPERATING
TEMPERATURE
Vcc
RANGE
PKG TYPE
(I
CCSB1
, Max)
, Max)
CC
(I
Vcc=3V
Vcc=5V Vcc=3V Vcc=5V Vcc=3V
BS62LV2000TC
BS62LV2000STC
BS62LV2000SC
BS62LV2000TI
BS62LV2000STI
BS62LV2000SI
TSOP 32
-
OC to +70O
2.7V ~ 5.5V 70 / 100
10uA
20uA
3uA
5uA
40mA
45mA
20mA
25mA
+0
STSOP 32
C
-
SOP 32
-
TSOP 32
-
O
O
-
40 C to +85 C 2.7V ~ 5.5V 70 / 100
STSOP 32
-
SOP 32
-
BLOCK DIAGRAM
PIN CONFIGURATIONS
1
A11
A9
OE
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
2
A10
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
GND
DQ2
DQ1
DQ0
A0
3
A8
A13
A17
4
A13
WE
CE2
A15
VCC
A17
A16
A14
A12
A7
5
A15
A16
A14
A12
A7
A6
A5
A4
Address
6
Memory Array
1024 x 2048
20
1024
BS62LV2000TC
BS62LV2000STC
BS62LV2000TI
BS62LV2000STI
7
Row
Input
8
9
Decoder
Buffer
10
11
12
13
14
15
16
A6
A1
2048
A5
A2
A4
A3
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
8
Data
8
Column I/O
Input
Buffer
Write Driver
Sense Amp
A17
A16
A14
A12
A7
32
1
VCC
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
8
2
8
Data
3
256
Column Decoder
16
Output
Buffer
4
5
A6
6
A5
7
BS62LV2001SC
BS62LV2001SI
A4
8
CE1
CE2
WE
OE
A3
9
Control
Address Input Buffer
A2
10
11
12
13
14
15
16
A1
A0
Vdd
Gnd
DQ0
DQ1
DQ2
GND
A9 A8 A3 A2 A1 A0 A10
A11
Brilliance Semiconductor Inc. reserves the right to modify document contents without notice.
Revision 2.3
April 2002
R0201-BS62LV2000
1
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