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AZ10EL89 PDF预览

AZ10EL89

更新时间: 2024-01-01 05:24:52
品牌 Logo 应用领域
AZM 驱动器
页数 文件大小 规格书
4页 116K
描述
ECL/PECL Coaxial Cable Driver

AZ10EL89 技术参数

是否Rohs认证: 符合生命周期:Contact Manufacturer
包装说明:,Reach Compliance Code:compliant
风险等级:5.7Base Number Matches:1

AZ10EL89 数据手册

 浏览型号AZ10EL89的Datasheet PDF文件第2页浏览型号AZ10EL89的Datasheet PDF文件第3页浏览型号AZ10EL89的Datasheet PDF文件第4页 
ARIZONA MICROTEK, INC.  
AZ10EL89  
ECL/PECL Coaxial Cable Driver  
FEATURES  
PACKAGE AVAILABILITY  
375ps Propagation Delay  
1.6V Output Swing  
Internal Input Pulldown Resistors  
Operating Range of 4.2V to 5.7V  
Direct Replacement for ON Semiconductor  
MC10EL89  
PACKAGE  
SOIC 8  
PART NUMBER  
AZ10EL89D  
MARKING  
AZM10EL89  
NOTES  
1,2  
1
Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts)  
Tape & Reel.  
2
Date Code “YWW” on underside of part.  
Transistor Count = 29 devices  
DESCRIPTION  
The AZ10EL89 is a differential fanout gate specifically designed to drive coaxial cables. The device is  
especially useful in Digital Video Broadcasting applications. For this application, since the system is polarity free,  
each output can be used as an independent driver. The driver has a voltage gain of approximately 40 and produces  
an output swing twice as large as standard ECL output. When driving a coaxial cable, proper termination is required  
at both ends of the line to minimize signal loss. The 1.6 V output swing allows for termination at both ends of the  
cable, while maintaining the required 800 mV swing at the receiving end of the cable. Because of the larger output  
swings, the device cannot be terminated into the standard VCC -2.0V. All of the DC parameters are tested with a  
50to VCC -3.0V load. The driver accepts a standard differential ECL input and can run off of the Digital Video  
Broadcast standard -5.0V supply. Under open input conditions (pulled to VEE) internal input clamps will force the  
Qn output LOW.  
NOTE: Specifications in ECL/PECL tables are valid when thermal equilibrium is established.  
LOGIC DIAGRAM AND PINOUT ASSIGNMENT  
1
2
3
4
8
VCC  
PIN DESCRIPTION  
Q0  
Q0  
PIN  
FUNCTION  
Data Inputs  
Q0, Q¯¯0,Q1, Q¯¯1 Data Outputs (1.6VPP)  
D, D¯  
D
7
6
VCC  
VEE  
Positive Supply  
Negative Supply  
Q1  
Q1  
D
5
VEE  
1630 S. STAPLEY DR., SUITE 127 MESA, ARIZONA 85204 USA (480) 962-5881 FAX (480) 890-2541  
www.azmicrotek.com  

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