Datasheet > AZ10EL16

AZ10EL16

更新时间： 2024-02-10 04:45:40

品牌	Logo	应用领域
AZM		/
页数	文件大小	规格书
6页	80K
描述
ECL/PECL Differential Receiver

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技术参数
数据手册

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AZ10EL16 技术参数

生命周期：	Contact Manufacturer	零件包装代码：	DIE
包装说明：	DIE,	Reach Compliance Code：	unknown
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.71	Is Samacsys：	N
输入特性：	DIFFERENTIAL	接口集成电路类型：	LINE RECEIVER
接口标准：	GENERAL PURPOSE	JESD-30 代码：	X-XUUC-N
标称负供电电压：	-5.2 V	功能数量：	1
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	UNSPECIFIED	封装代码：	DIE
封装形状：	UNSPECIFIED	封装形式：	UNCASED CHIP
认证状态：	Not Qualified	最大接收延迟：	0.375 ns
接收器位数：	1	表面贴装：	YES
温度等级：	INDUSTRIAL	端子形式：	NO LEAD
端子位置：	UPPER	Base Number Matches：	1

AZ10EL16 数据手册

ARIZONA MICROTEK, INC.

AZ10EL16

AZ100EL16

ECL/PECL Differential Receiver

FEATURES

PACKAGE AVAILABILITY

•

RoHS Compliant / Lead (Pb) Free Package

Available

250ps Propagation Delay

High Bandwidth Output Transitions

75kΩ Internal Input Pulldown Resistors

Direct Replacement for ON Semiconductor

MC10EL16 & MC100EL16

PACKAGE

PART NUMBER

MARKING

AZM10

EL16

AZM100

EL16

NOTES

SOIC 8

AZ10EL16D

1,2

•

SOIC 8

AZ100EL16D

AZ100EL16D+

1,2

SOIC 8 RoHS

Compliant /

Lead (Pb) Free

AZM100+

EL16

TSSOP 8

AZ10EL16T

AZ100EL16T

AZT16T

AZH16T

1,2

TSSOP 8

Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K

parts) Tape & Reel.

Date code format: “Y” or “YY” for year followed by “WW” for week on

underside of part.

DESCRIPTION

The AZ10/100EL16 is a differential receiver. The device is functionally equivalent to the E116 device with

higher performance capabilities. With output transition times significantly faster than the E116, the EL16 is ideally

suited for interfacing with high frequency sources.

The EL16 provides a V_BBoutput for either single-ended use or a DC bias reference for AC coupling to the

device. For single-ended input applications, the V_BBreference should be connected to one side of the D/D¯ differential

input pair. The input signal is then fed to the other D/D¯ input. The V_BBpin can support 1.0mA sink/source current.

When used, the V_BBpin should be bypassed to ground via a 0.01μF capacitor.

Under open input conditions (pulled to V_EE) internal input clamps will force the Q output LOW.

NOTE: Specifications in the ECL/PECL tables are valid when thermal equilibrium is established.

LOGIC DIAGRAM AND PINOUT ASSIGNMENT

PIN DESCRIPTION

V_CC

D, D¯

Q, Q¯

V_BB

V_CC

V_EE

FUNCTION

Data Inputs

Data Outputs

Reference Voltage Output

Positive Supply

Negative Supply

No Connect

V_EE

V_BB

1630 S. STAPLEY DR., SUITE 127 • MESA, ARIZONA 85204 • USA • (480) 962-5881 • FAX (480) 890-2541

www.azmicrotek.com

12 3 4 5 6

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与AZ10EL16相关器件

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AZ10EL16D	AZM	ECL/PECL Differential Receiver	获取价格
AZ10EL16T	AZM	ECL/PECL Differential Receiver	获取价格
AZ10EL16VO	AZM	ECL/PECL Oscillator Gain Stage and Buffer with Enable	获取价格
AZ10EL16VOD	AZM	ECL/PECL Oscillator Gain Stage and Buffer with Enable	获取价格
AZ10EL16VOT	AZM	ECL/PECL Oscillator Gain Stage and Buffer with Enable	获取价格
AZ10EL16VOT+	AZM	ECL/PECL Oscillator Gain Stage and Buffer with Enable	获取价格