Datasheet > AZ100ELT21T

AZ100ELT21T

更新时间： 2024-02-23 14:58:50

品牌	Logo	应用领域
AZM		转换器
页数	文件大小	规格书
5页	68K
描述
Differential PECL to CMOS/TTL Translator

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

AZ100ELT21T 技术参数

是否Rohs认证：	符合	生命周期：	Contact Manufacturer
包装说明：	,	Reach Compliance Code：	compliant
风险等级：	5.68	Base Number Matches：	1

AZ100ELT21T 数据手册

ARIZONA MICROTEK, INC.

AZ100ELT21

Differential PECL to CMOS/TTL Translator

FEATURES

PACKAGE AVAILABILITY

•

Green / RoHS Compliant /

Lead (Pb) Free Package Available

3.5ns Typical Propagation Delay

Differential PECL Inputs

CMOS/TTL Outputs

Flow Through Pinouts

Operating Range of 3.0V to 5.5V

Direct Replacement for

PACKAGE

PART NO.

MARKING NOTES

AZM100

•

SOIC 8

AZ100ELT21D

ELT21

1,2

AZM100G

ELT21

AZH

T21

AZHG

T21

SOIC 8 Green /

RoHS Compliant /

Lead (Pb) Free

AZ100ELT21DG

AZ100ELT21T

AZ100ELT21TG

ON Semiconductor MC100ELT21

Use AZ100ELT21 for 10K

Applications

TSSOP 8

•

TSSOP 8 Green /

RoHS Compliant /

Lead (Pb) Free

Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts)

Tape & Reel.

Date code format: “Y” for year followed by “WW” for week.

DESCRIPTION

The AZ100ELT21 is a differential PECL to CMOS/TTL translator. Because PECL (Positive ECL) levels are

used, only V_CCand ground are required. The small outline 8-lead packaging and the single gate of the ELT21 makes

it ideal for those applications where space, performance and low power are at a premium.

The ELT21 provides a V_BBoutput for single-ended use or a DC bias reference for AC coupling to the device.

For single-ended input applications, the V_BBreference should be connected to one side of the D0/D¯¯0 differential

input pair. The input signal is then fed to the other D0/D¯¯0 input. The V_BBpin should be used only as a bias for the

ELT21 as its sink/source capability is limited. When used, the V_BBpin should be bypassed to ground via a 0.01μF

capacitor.

NOTE: Specifications in the ECL/PECL tables are valid when thermal equilibrium is established.

LOGIC DIAGRAM AND PINOUT ASSIGNMENT

PIN DESCRIPTION

FUNCTION

CMOS/TTL

CMOS/TTL Output

Differential Inputs

Positive Supply

Reference Voltage Output

Ground

D0, D¯¯0

V_CC

V_BB

PECL

GND

No Connect

GND

1630 S. STAPLEY DR., SUITE 127 • MESA, ARIZONA 85204 • USA • (480) 962-5881 • FAX (480) 890-2541

www.azmicrotek.com

12 3 4 5

下载PDF

与AZ100ELT21T相关器件

型号	品牌	描述	获取价格	数据表
AZ100ELT21TG	AZM	Differential PECL to CMOS/TTL Translator	获取价格
AZ100ELT21TR1	ETC	Differential PECL to CMOS/TTL Translator	获取价格
AZ100ELT21TR2	ETC	Differential PECL to CMOS/TTL Translator	获取价格
AZ100ELT22	AZM	CMOS/TTL to Differential PECL Translator	获取价格
AZ100ELT22_12	AZM	Dual CMOS/TTL to Differential PECL Translator	获取价格
AZ100ELT22D	AZM	CMOS/TTL to Differential PECL Translator	获取价格