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AT681

更新时间: 2022-11-29 10:12:51
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描述
PHASE CONTROL THYRISTOR

AT681 数据手册

 浏览型号AT681的Datasheet PDF文件第2页浏览型号AT681的Datasheet PDF文件第3页浏览型号AT681的Datasheet PDF文件第4页 
Via N. Lorenzi 8 - I 16152 GENOVA - ITALY  
Tel. int. +39/(0)10 6556549 - (0)10 6556488  
Fax Int. +39/(0)10 6442510  
Ansaldo Trasporti s.p.a.  
Unita' Semiconduttori  
ANSALDO  
Tx 270318 ANSUSE I -  
PHASE CONTROL THYRISTOR AT681  
Repetitive voltage up to  
Mean on-state current  
6000 V  
840 A  
10 kA  
Surge current  
FINAL SPECIFICATION  
feb 97 - ISSUE : 02  
Tj  
[°C]  
Symbol  
Characteristic  
Conditions  
Value  
Unit  
BLOCKING  
V RRM  
V RSM  
V DRM  
I RRM  
I DRM  
Repetitive peak reverse voltage  
Non-repetitive peak reverse voltage  
Repetitive peak off-state voltage  
Repetitive peak reverse current  
Repetitive peak off-state current  
120 6000  
120 6100  
120 6000  
V
V
V
V=VRRM  
V=VDRM  
120  
120  
150  
150  
mA  
mA  
CONDUCTING  
I T (AV)  
I T (AV)  
I TSM  
I² t  
Mean on-state current  
Mean on-state current  
Surge on-state current  
I² t  
180° sin, 50 Hz, Th=55°C, double side cooled  
180° sin, 50 Hz, Tc=85°C, double side cooled  
sine wave, 10 ms  
840  
A
A
705  
120  
10  
kA  
without reverse voltage  
500 x1E3  
2.4  
A²s  
V
V T  
On-state voltage  
On-state current = 1570 A  
25  
V T(TO)  
r T  
Threshold voltage  
On-state slope resistance  
120  
1.3  
V
120 1.150  
mohm  
SWITCHING  
di/dt  
dv/dt  
td  
Critical rate of rise of on-state current  
From 75% VDRM up to 1200 A  
120  
120  
25  
100  
500  
5
A/µs  
V/µs  
µs  
Critical rate of rise of off-state voltage, min. Linear ramp up to 75% of VDRM  
Gate controlled delay time, typical  
Circuit commutated turn-off time, typical  
Reverse recovery charge  
VD=200V, gate source 20V, 10 ohm  
dV/dt = 20 V/µs linear up to 80% VDRM  
di/dt=-60 A/µs, I= 1000 A  
tq  
650  
µs  
Q rr  
I rr  
I H  
120  
µC  
A
Peak reverse recovery current  
Holding current, typical  
VR= 50 V  
25  
25  
300  
700  
mA  
mA  
I L  
Latching current, typical  
GATE  
V GT  
Gate trigger voltage  
25  
25  
3.5  
400  
0.5  
30  
10  
5
V
mA  
V
I GT  
Gate trigger current  
VD=5V  
V GD  
V FGM  
Non-trigger gate voltage, min.  
Peak gate voltage (forward)  
Peak gate current  
0.5 VDRM  
120  
V
I
FGM  
A
V RGM  
P GM  
P G  
Peak gate voltage (reverse)  
Peak gate power dissipation  
Average gate power dissipation  
V
Pulse width 100 µs  
150  
2
W
W
MOUNTING  
R th(j-h)  
Thermal impedance, DC  
Thermal impedance  
Junction to heatsink, double side cooled  
Case to heatsink, double side cooled  
21  
6
°C/kW  
°C/kW  
R th(c-h)  
T j  
F
Operating junction temperature  
Mounting force  
120  
°C  
kN  
g
22.0 / 24.5  
520  
Mass  
ORDERING INFORMATION : AT681 S 60  
VDRM&VRRM/100  
standard specification  

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