October 1991
Revised November 1999
100310
Low Skew 2:8 Differential Clock Driver
General Description
Features
The 100310 is a low skew 8-bit differential clock driver
which is designed to select between two separate differen-
tial clock inputs. The low output to output skew (< 50 ps) is
maintained for either clock input. A LOW on the select pin
(SEL) selects CLKINA, CLKINA and a HIGH on the SEL
pin selects the CLKINB, CLKINB inputs.
■ Low output to output skew
■ Differential inputs and outputs
■ Allows multiplexing between two clock inputs
■ Voltage compensated operating range: −4.2V to −5.7V
■ Available to industrial grade temperature range
(PLCC package only)
The 100310 is ideal for those applications that need the
ability to freely select between two clocks, or to maintain
the ability to switch to an alternate or backup clock should a
problem arise with the primary clock source.
A VBB output is provided for single-ended operation.
Ordering Code:
Order Number Package Number
Package Description
100310QC
100310QI
V28A
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (−40°C to +85°C)
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
28-Pin PLCC
Truth Table
Pin Descriptions
Pin Names
Description
CLKn CLKn
CLKINA CLKINA CLKINB CLKINB SEL
CLKINn, CLKINn
Differential Clock Inputs
Select
H
L
L
H
X
X
X
X
H
L
X
X
L
L
L
H
L
L
H
L
SEL
CLK0–7, CLK0–8
Differential Clock Outputs
VBB Output
X
X
H
H
H
L
VBB
NC
H
H
No Connect
© 1999 Fairchild Semiconductor Corporation
DS010943
www.fairchildsemi.com